Memory devices typically include memory elements for storing data. “Flash” electrically erasable and programmable read only memories (EEPROMs) can include an electrical storage gate layer for altering a transistor threshold voltage. Thus, such devices may sense data values based on a transistor threshold voltage.
Devices having one time programmable elements, such as “anti-fuse” elements, can program an element by creating a non-reversible conductive path. Thus, such devices may sense data values based on a static resistance of the cell.
Conventional conductive bridge random access memories (CBRAMs) may include memory elements (sometimes referred to as programmable metallization cells (PMCs)) that may be programmed (or erased) to different resistance levels. Many PMC cells may have a metal-insulator-metal (MIM) structure. In one state (e.g., erased), substantially no current may flow through the MIM structure. In another state (e.g., programmed), a conductive path may be formed through the ion conducting insulator layer. Accordingly, such memory devices may sense data values based on a resistance of a storage element (e.g., PMC).
A drawback to some memory types can be a tendency for memory elements to exhibit a change in property that makes sensing operations inaccurate. That is, a memory element may undergo changes during operation that results in the element exhibiting an erroneous value. Another drawback may arise from sensitive sensing circuits. Such sensing circuits may have difficulty detecting a data values stored by a memory element state, depending upon the operating conditions and state of the memory element. Noise or other effects may result in sense operations occasionally yielding erroneous results.
FIG. 26A is a timing diagram showing a response of a conventional memory device having a PMC element. FIG. 26A shows sensed current Isense and a sense amplifier output SA OUT. A current threshold level Ithresh determines a stored data value. In the embodiment shown, when Isense>Ithresh, an output value SA OUT will be “1”. When Isense<Ithresh, an output value SA OUT will be “0”.
FIG. 26A shows two sensing periods Tsense0 and Tsense1. As shown, under read conditions a current Isense flowing through a PMC element can, for the most part, stay below Isense. However, during time Tsense1, Isense can rise above Ithresh, due to noise or other effects. A sense amplifier can be sensitive to detecting small changes in current, and thus can output a value “1”, when the memory element stores a value “0”.
FIG. 26B is a timing diagram showing an undesirable response of a memory element under conventional operations. FIG. 26B include the following waveforms: OP, which show an operation performed on a memory element; ELEMENT R, which shows a sensed resistance of an element; and DATA_OUT, which shows read output data value for the element. In FIG. 26B it is assumed that a programmed element should provide an output data value DATA_OUT of “0”.
At about time t0, an element can be programmed (PROG). Such an operation can result in an element resistance (ELEMENT R) being at a relatively low value. At about time t1, a read operation can be performed (READ) that generates an output value based on an ELEMENT_R level. As shown, a sensed ELEMENT R value can be higher than desired. Consequently, a sensed data value is a “1”, when a “0” is desired.
In response to such an erroneous read value, an element can be “cycled” through an erase operation at time t3, followed by another program operation at time t4. After such a cycling, an element can have a desired resistance. Thus, at time t5 a READ operation can be performed that yields a correct DATA_OUT value at time t6.